1/10 march 2004 stb85nf55 stp85nf55 n-channel 55v - 0.0062 ? - 80a d 2 pak/to-220 stripfet? ii power mosfet typical r ds (on) = 0.0062 ? for through-hole version contact sales office description this power mosfet is the latest development of stmicroelectronis unique "single feature size?" strip-based process. the resulting transistor shows extremely high packing density for low on- resistance, rugged avalanche characteristics and less critical alignment steps therefore a remark- able manufacturing reproducibility. applications high current switching application automotive environment type v dss r ds(on) i d stb85nf55 stp85nf55 55 v 55 v <0.008 ? <0.008 ? 80 a 80 a 1 2 3 to-220 1 3 d 2 pak to-263 (suffix ?t4?) absolute maximum ratings ( ? )current limited by package ( ??) pulse width limited by safe operating area (1) i sd 80a, di/dt 300a/s, v dd v (br)dss , t j t jmax . (2) starting t j = 25 o c i d = 40a v dd = 25v symbol parameter value unit v ds drain-source voltage (v gs = 0) 55 v v dgr drain-gate voltage (r gs = 20 k ? ) 55 v v gs gate- source voltage 20 v i d ( ? ) drain current (continuous) at t c = 25c 80 a i d drain current (continuous) at t c = 100c 80 a i dm ( ??) drain current (pulsed) 320 a p tot total dissipation at t c = 25c 300 w derating factor 2.0 w/c dv/dt (1) peak diode recovery voltage slope 10 v/ns e as (2) single pulse avalanche energy 980 mj t stg storage temperature -55 to 175 c t j max. operating junction temperature internal schematic diagram
stb85nf55/stp85nf55 2/10 thermal data electrical characteristics (t case = 25 c unless otherwise specified) off on (* ) dynamic rthj-case rthj-amb t l thermal resistance junction-case thermal resistance junction-ambient maximum lead temperature for soldering purpose max max 0.5 62.5 300 c/w c/w c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 55 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs i d = 250 a 234v r ds(on) static drain-source on resistance v gs = 10 v i d =40 a 0.0062 0.008 ? symbol parameter test conditions min. typ. max. unit g fs (*) forward transconductance v ds = 15v i d = 40 a 120 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v f = 1 mhz v gs = 0 3700 900 310 pf pf pf
3/10 stb85nf55/stp85nf55 switching on switching off source drain diode (*) pulsed: pulse duration = 300 s, duty cycle 1.5 %. ( ?) pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 30 v i d = 40 a r g =4.7 ? v gs = 10 v (resistive load, figure 3) 25 100 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd= 30v i d =80a v gs =10v (see test circuit, figure 4) 120 30 45 150 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 30 v i d = 40 a r g =4.7 ?, v gs = 10 v (resistive load, figure 3) 70 35 ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm ( ? ) source-drain current source-drain current (pulsed) 80 320 a a v sd (*) forward on voltage i sd = 80 a v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 80 a di/dt = 100a/s v dd = 25 v t j = 150c (see test circuit, figure 5) 75 210 5.5 ns nc a thermal impedance electrical characteristics (continued) safe operating area
stb85nf55/stp85nf55 4/10 output characteristics transfer characteristics transconductance static drain-source on resistance gate charge vs gate-source voltage capacitance variations
5/10 stb85nf55/stp85nf55 normalized gate threshold voltage vs temperature normalized on resistance vs temperature source-drain diode forward characteristics normalized breakdown voltage vs temperature. . .
stb85nf55/stp85nf55 6/10 fig. 1: unclamped inductive load test circuit fig. 1: unclamped inductive load test circuit fig. 2: unclamped inductive waveform fig. 3: switching times test circuits for resistive load fig. 4: gate charge test circuit fig. 5: test circuit for inductive load switching and diode recovery times
7/10 stb85nf55/stp85nf55 dim. mm. inch. min. typ. max. min. typ. typ. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 a2 0.03 0.23 0.001 0.009 b 0.7 0.93 0.028 0.037 b2 1.14 1.7 0.045 0.067 c 0.45 0.6 0.018 0.024 c2 1.21 1.36 0.048 0.054 d 8.95 9.35 0.352 0.368 d1 8 0.315 e 10 10.4 0.394 0.409 e1 8.5 0.334 g 4.88 5.28 0.192 0.208 l 15 15.85 0.591 0.624 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.069 m 2.4 3.2 0.094 0.126 r 0.4 0.015 v2 0 8 0 8 d 2 pak mechanical data
stb85nf55/stp85nf55 8/10 dim. mm. inch. min. typ. max. min. typ. typ. a 4.4 4.6 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.40 2.70 0.094 0.106 h2 10 10.40 0.393 0.409 l2 16.40 0.645 l3 28.90 1.137 l4 13 14 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.20 6.60 0.244 0.260 l9 3.50 3.93 0.137 0.154 dia 3.75 3.85 0.147 0.151 to-220 mechanical data
9/10 stb85nf55/stp85nf55 dim. mm inch min. max. min. max. a0 10.5 10.7 0.413 0.421 b0 15.7 15.9 0.618 0.626 d 1.5 1.6 0.059 0.063 d1 1.59 1.61 0.062 0.063 e 1.65 1.85 0.065 0.073 f 11.4 11.6 0.449 0.456 k0 4.8 5.0 0.189 0.197 p0 3.9 4.1 0.153 0.161 p1 11.9 12.1 0.468 0.476 p2 1.9 2.1 0075 0.082 r 50 1.574 t 0.25 0.35 .0.0098 0.0137 w 23.7 24.3 0.933 0.956 dim. mm inch min. max. min. max. a 330 12.992 b 1.5 0.059 c 12.8 13.2 0.504 0.520 d 20.2 0.795 g 24.4 26.4 0.960 1.039 n 100 3.937 t 30.4 1.197 base qty bulk qty 1000 1000 reel mechanical data * on sales type tube shipment (no suffix)* tape and reel shipment (suffix ?t4?)* d 2 pak footprint tape mechanical data
stb85nf55/stp85nf55 10/10 i nformation furnished is believed to be accurate and reliable. ho wever, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subje ct t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are n ot a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners. ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco -singapore - spain - sweden - switzerland - united kingdom - united states. www.st.com
|
